July 24, 2025
By Matthew Bolig
Senior Advisor, Product & Technology Marketing
Learn about where the industry stands with the ongoing development of 448G/lane technology, and how innovation and collaboration are coming together to define a new generation of data center networking for the AI era.
AI has been the major story in technology for more than two years now; an economic locomotive that’s pulling a massive train of opportunities that range throughout all sectors of the global economy. The one feature of this train that many people are still getting accustomed to is just how fast AI-driven demand is moving industries forward.
A poignant example of just how fast innovation is moving can be seen in data center networking. The 1.6T IMDD speed node based on 224Gbps per lane technology is slated to begin deployments in the second half of 2025. But here is the incredible part, almost a year earlier Ciena was already paving the way for what’s next. At the 2024 Open Compute Project Global Summit, we showed how we are leading the charge with a live demonstration of our 448G PAM4 technology, including showing the world’s first data eye at this speed.
Ciena Booth at OCP Global Summit, October 2024
In order to appreciate the actual velocity of this phenomenon, it’s instructive to examine the past. Networking gear optimized for cloud data centers can be traced back to the introduction of the first true data center switch in 2014. In the eleven years going back to 2014, there have been two lane speed upgrades for data center switches: 25G to 50G, 50G to 100G. AI-driven demand is pushing the networking industry to now deliver two speed upgrades in a fraction of the time. What’s even more amazing is that these speed increases include engineering challenges that have grown exponentially more complex as the technology advances into the range of femtoseconds.
There may be some question about how the emergence of near-package and co-package optics affects the push for higher IO speeds. As detailed below, a key benefit of 448G signaling applies directly to GPU performance. So, the value of the speed increase pertains to the overall system irrespective of interconnect implementation.
Data Center Optics Evolution
The demand for more data center bandwidth
A significant driver for more bandwidth, delivered faster, stems directly from GPU evolution and how it relates to the chip’s mechanical architecture. The growing demand for computational power has pushed GPUs to enormous sizes, to enable the addition of as much computational circuitry as possible, in some instances reaching to reticle-limited sizes on the order of 800mm2. Of course, GPUs are now architected in clusters of thousands, or tens of thousands. This means huge quantities of data need to be sent off the chip through the GPU’s high-speed IO, which is typically positioned around the die’s perimeter otherwise known as ‘beachfront’. Herein lies the issue: as die sizes increase, compute resources multiply with area while high speed IO resources only add at the perimeter. This is what’s known as beachfront limitation.
This (greatly) simplified example shows how larger dies reduce the beachfront to compute ratio. In this scenario a generational upgrade increases GPU size from 24mm2 to 28mm2. Here, the compute area of the chip in the core is increases from 576 mm2 to 784 mm2, a 36% gain.
How Larger Dies Change Compute to IO Ratio
Concurrently, the perimeter, where the beachfront area of the die is located, only increased from 96mm to 112 mm, or about 17%. So, roughly speaking, the move to the Gen 2 GPU created 20% more data generation resources than external communication resources, all other factors being equal. Speeding up the data rate of the beachfront IO is a proven way to help alleviate the bottleneck created by this limitation.
Ciena 448G technical leadership demonstrated at OFC 2025
Ciena is taking on the beachfront issue headfirst. Starting in 2024 with our 448G PAM demo and related technical presentation at OCP, we have continued to drive this technology forward at a remarkable pace. At OFC 2025, we featured three important technology displays. Although each one of these displays was distinct, there was a common underlying motivation: to help propel the industry ecosystem faster to deliver the solutions that our customers are asking for. Let’s take a closer look at each display and the innovations being pushed forward:
1. Ciena’s OFC 2025 transmit optical demo showed a 400G PAM4 data eye that was done in partnership with Coherent who provided the Electro-absorption Modulated Laser (EML). EML’s have historically been the first lasers to deploy for a new data center network speed node and continue to be the workhorses of a major percentage of single mode links operating today. Demonstrating the 448G Tx technology - including DSP transmitters and EML’s - is an important step in bringing the overall ecosystem up.
OFC 2025 400G PAM4 Optical Demo in Partnership with Coherent
2. Ciena’s 448G host interface demo staged at the OIF booth received an extraordinary amount of attention… and with good reason. Arguably, the hottest topic surrounding 448G implementation is the host side modulation format where bandwidth constraints are creating challenges on the copper interconnect that are not seen on the optical interface. While PAM6 is getting a lot of attention these days, there is still a lot of work to be done, and Ciena is playing a critical role in driving these efforts. This is because our host interface SERDES can support PAM4, PAM6, and PAM8, thereby paving the way for essential experimentation, including quantitative data collection and analysis, as we showed during this important demonstration. If you are attending ECOC this year you can learn more about the latest developments in this area during Ciena's speaking session, "Powering AI: Exploring modulation strategies for 448G electrical interconnects."
OFC 2025 Demo at OIF Booth Showing 448G Data Using Different Modulation Formats
In fact, we are using our modulation flexible technology platform to enable important technical exploration work today. A part of this work was detailed when Ciena’s Senior Engineering Director, Naim Ben-Hamida, did a detailed follow up presentation at the OIF Workshop in April of 2025 providing additional data and insights into modulation format tradeoffs. Slides for the presentation are located here.
Ciena Senior Director for Analog Design, Naim Ben-Hamida, Presents as OIF Workshop in April of 2025
3. The final component Ciena’s 448G technology demonstration at OFC 2025 came in the form of a post-deadline paper outlining performance of the world’s first fully operational 2km, 3.2T link featuring eight lanes of 448G data. This paper was done in cooperation with Keysight, HyperLight and McGill University. Hyperlight provided Thin Film Lithium Niobate (TFLN) modulator for the experiment while McGill hosted and facilitated the testing. This paper detailed truly pioneering work that built on the science of single lane operation to develop a system that is much closer to an operational solution.
Optical Data Eye at 448G Used for 2km Link Demo Described in Post-Deadline Paper with McGill University, Hyperlight and Keysight
There is also an accompanying video that provides details on experiment set up as well as results:
Driving collaboration for 448G advancements
The good news is that the entire industry is moving with a sense of urgency on 448G. There now seems to be a six-month cadence for industry participants to synch on the state of 448G technology. This started with the Ethernet Alliance’s Technology Exploration Forum (TEF) in November of 2024 with a more recent 448G Workshop organized by the OIF in April of 2025. These meetings have been extremely important as they bring together a multitude of technology vendors who are working to develop the emerging ecosystem along with the cloud service providers who are the ultimate consumers of this technology and uniquely positioned to explain requirements. Importantly, IEEE has also begun work on 448G with New Ethernet Application (NEA) ad hoc meeting held in June of 2025. These are just the first steps to develop the first generation of IEEE protocols in the AI era.
As we look towards the next generation of data center AI networking, two things are clear. The industry must deliver the infrastructure for 448G, and it must deliver it quickly. This will require an enormous amount of work from a huge number of ecosystem participants. Semiconductor vendors, PCB manufacturers, advanced cabling and connector suppliers, standards bodies and especially cloud service providers must all work together to evolve to a new paradigm of closer collaboration and cooperation to make this effort a success. The early indicators are positive. It’s up to all of us to now keep the train rolling.